Graphene, a one-atom-thick layer of graphitic carbon, has the potential to make consumer electronic devices faster and smaller. But its unique properties, and the shrinking scale of electronics, also make graphene difficult to fabricate and to produce on a large scale.
In September 2010, a UCLA research team reported that they had overcome some of these difficulties and were able to fabricate graphene transistors with unparalleled speed. These transistors used a nanowire as the self-aligned gate the element that switches the transistor between various states. But the scalability of this approach remained an open question.
Now the researchers, using equipment from the Nanoelectronics Research Facility and the Center for High Frequency Electronics at UCLA, report that they have developed a scalable approach to fabricating these high-speed graphene transistors.
The team used a dielectrophoresis assembly approach to precisely place nanowire gate arrays on large-area chemical vapor depositiongrowth graphene as opposed to mechanically peeled graphene flakes to enable the rational fabrication of high-speed transistor arrays. They were able to do this on a glass substrate, minimizing parasitic delay and enabling graphene transistors with extrinsic cut-off frequencies exceeding 50 GHz. Typical high-speed graphene transistors are fabricated on silicon or semi-insulating silicon carbide substrates that tend to bleed off electric charge, leading to extrinsic cut-off frequencies of around 10 GHz or less.
Taking an additional step, the UCLA team was able to use these graphene transistors to construct radio-frequency circuits functioning up to 10 GHz, a substantial improvement from previous reports of 20 MHz.
The research opens a rational pathway to scalable fabrication of high-speed, self-aligned graphene transistors and functional circuits and it demonstrates for the first time a graphene transistor with a practi
|Contact: Jennifer Marcus|
University of California - Los Angeles