Graphene, a one-atom-thick layer of graphitic carbon, has great potential to make electronic devices such as radios, computers and phones faster and smaller. But its unique properties have also led to difficulties in integrating the material into such devices.
In a paper published Sept. 1 in the journal Nature, a group of UCLA researchers demonstrate how they have overcome some of these difficulties to fabricate the fastest graphene transistor to date.
With the highest known carrier mobility the speed at which electronic information is transmitted by a material graphene is a good candidate for high-speed radio-frequency electronics. But traditional techniques for fabricating the material often lead to deteriorations in device quality.
The UCLA team, led by professor of chemistry and biochemistry Xiangfeng Duan, has developed a new fabrication process for graphene transistors using a nanowire as the self-aligned gate.
Self-aligned gates are a key element in modern transistors, which are semiconductor devices used to amplify and switch electronic signals. Gates are used to switch the transistor between various states, and self-aligned gates were developed to deal with problems of misalignment encountered because of the shrinking scale of electronics.
To develop the new fabrication technique, Duan teamed with two other researchers from the California NanoSystems Institute at UCLA, Yu Huang, an assistant professor of materials science and engineering at the Henry Samueli School of Engineering and Applied Sciences, and Kang Wang, a professor of electrical engineering at the Samueli School.
"This new strategy overcomes two limitations previously encountered in graphene transistors," Duan said. "First, it doesn't produce any appreciable defects in the graphene during fabrication, so the high carrier mobility is retained. Second, by using a self-aligned approach with a nanowire as the gate, the g
|Contact: Mike Rodewald|
University of California - Los Angeles