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Stanford engineers show how to optimize carbon nanotube arrays for use in hot spots

When engineers design devices, they must often join together two materials that expand and contract at different rates as temperatures change. Such thermal differences can cause problems if, for instance, a semiconductor chip is plugged into a socket that can't expand and contract rapidly enough to maintain an unbroken contact over time.

The potential for failure at such critical junctures has intensified as devices have shrunk to the nano scale, bringing subtle forces into play that tug at atoms and molecules, causing strains that are difficult to observe, much less avoid.

Writing in the Proceedings of the National Academy (PNAS), Stanford engineers report on how to create carbon nanotube structures that remain strong and supple at these critical interfaces where thermal stress is intrinsic to the design.

"Think about the heat sink for a microprocessor, " said senior PNAS author Kenneth Goodson, Professor and Bosch Chair of Mechanical Engineering at Stanford. "It is exposed to high heat fluxes for long periods of time, and repeated instances of heating and cooling."

At present materials like solder and gels have been used at such junctions. But as electronics continue to shrink, more electrical power gets pushed through smaller circuits, putting materials under ever increasing thermal stress.

"Solder has high thermal conductivity, but it's stiff," Goodson said, explaining why his lab continues to experiment with single-walled carbon nanotubes. Just before this PNAS contribution, his team described the favorable thermal properties of nanotubes in an article for Reviews of Modern Physics (Vol. 85, pp. 1296-1327).

Nanotubes are infinitesimally thin strands of carbon atoms that have the potential to be efficient at conducting heat. They are also strong for their size, and can be flexible depending on how they are fabricated.

The Stanford PNAS paper was based

Contact: Tom Abate
Stanford School of Engineering

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