According to Francisco Gmiz "since its invention in the 60's by Robert Dennard at IBM (USA), the commands and data necessary for the proper performance of a computer are stored as zeros (no charge) and ones (charge) in DRAM (Dynamic Random Access Memory) cell arrays". These cell arrays are composed of a transistor and a capacitor ( 1T-1C-DRAM). Each bit of information is stored as an electric charge in a cell consisting on a transistor and a capacitor that provides access to the charge and, consequently, to the data.
Since its development, the DRAM concept has remained unchanged. Currently, we can find DRAM cells smaller than 20nm (1 nanometer is one billionth of a meter) and DRAM memory chips of several gigabytes (one gigabyte is one billion of bites). However, the possibilities of making these cells smaller are becoming exhausted due to the minimum charge needed to clearly distinguish between the two estates of a bit (1 and 0). This is drawing the line to the minimum size of capacitors. "If we cannot further reduce the size of the capacitor, the solution is to replace it with 1T-DRAM memory cells -or one-transistor memories- that store information directly in the transistor, which simultaneously detects the estate of the cells and gives access to the information stored."
|Contact: Francisco Gmiz Prez|
University of Granada